Semiconductor fabber TSMC and physicists from the Industrial Technology Research Institute (ITRI) in Taiwan have developed a faster-than-DRAM SOT MRAM implementation.
They claim it is an STT RAM (spin-transfer-torque magnetic random-access memory) replacement that requires just 1 percent of STT MRAM’s operating electricity.
Dr Shih-Chieh Chang, general director of Electronic and Optoelectronic System Research Laboratories at ITRI, said in a release: “This unit cell achieves simultaneous low power consumption and high-speed operation, reaching speeds as rapid as 10 nanoseconds. And its overall computing performance can be further enhanced when integrated with computing in memory circuit design. Looking ahead, this technology holds the potential for applications in high-performance computing (HPC), artificial intelligence (AI), automotive chips, and more.”
We discussed spin-orbit-torque magnetic random-access memory (SOT MRAM) physics and electrical underpinnings two years ago here.
The ITRI scientists, who jointly presented a research paper with TSMC at the 2023 IEEE International Electron Devices Meeting (IEDM 2023), say that their SOT MRAM has a computing in memory architecture.
We understand that the SOT MRAM chip used ITRI’s 8-inch back end of line (BEOL) process and chip design team. ITRI claims its chip has “features of unlimited endurance.” Chang has said that the SOT MRAM technology has a 0.4 nanoseconds write speed and its endurance supports 7 trillion reads and writes, with a storage lifespan greater than 10 years.
This puts in the same area in the memory-storage hierarchy as Micron’s NVDRAM technology.
We have asked ITRI for an official copy of the research paper for further details.
