SK hynix targets AI datacenters with industry’s first 1c DDR5 memory

DRAM and NAND fabricator SK hynix has revealed the industry’s first 16Gb DDR5 memory system using a 1c node – the sixth generation of the 10nm process, building on 1b.

The silicon slinger promised it will be ready for mass production of the 1c DDR5 “within the year” to start volume shipments next year.

The product improves cost competitiveness in manufacturing, compared with 1b, by adopting new materials and processes, said the South Korea-headquartered manufacturer.

SK Hynix 1c DDR5.

In May 2023, Samsung Electronics announced it had succeeded in mass-producing 1b-nanometer DRAMs for the first time in the industry. SK hynix then followed suit. Samsung said earlier this year it planned to start mass-producing a 1c DRAM by the end of this year – but no updates have been forthcoming, so SK hynix now seems to be ahead.

Double Data Rate 5 (DDR5) Synchronous Dynamic Random-Access Memory (SDRAM) promises to reduce power consumption and increase bandwidth, compared to its predecessor DDR4 SDRAM. 

The operating speed of 1c DDR5 – expected to be adopted for high-performance datacenters – has been improved by 11 percent from the previous generation to 8Gbit/sec, said SK hynix. Power efficiency is also improved by more than 9 percent, we are told, as datacenters of course face increased power demands as a result of having to deal with AI workloads.

“We are committed to providing differentiated values to customers by applying the 1c technology, equipped with the best performance and cost competitiveness, to our major next-generation products, including HBM, LPDDR6, and GDDR7 systems,” said Kim Jonghwan, head of DRAM development at SK hynix. “We will continue to work towards maintaining our leadership in the DRAM space, to position SK hynix as a trusted AI memory solution provider.”

Earlier this month, SK hynix said it was developing a computational object storage system (OCS) with Los Alamos Nuclear Labs (LANL) to streamline analytics workloads. Object data is stored in Parquet files on NVMe SSDs, and when LANL wants to do a large scale simulation run, the data on the SSDs is preprocessed by the OCS to reduce the dataset sent to the analysis servers.