MLC – Multi-Level Cell. The term is used to describe NAND with 2 bits per cell. Cells with 1, 3, 4 and 5 bits are called SLC (Single Level Cell), TLC (Triple Level Cell), QLC (Quad Level Cell) and PLC (Penta Level Cell) respectively. Cells are read by using electrical voltages at various thresholds to detect the bit values. Here is how these multiple value cells work, with possible binary values for SLC, MLC, TLC, QLC and PLC cells being:
- SLC = 0 or 1 – meaning two states and one threshold voltage,
- MLC = 00, 10, 01, or 11 – four states and so three threshold voltages,
- TLC = 000, 001, 010, 011, 100, 101, 110, 111 – eight states and thus seven threshold voltages,
- QLC = 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111 – 16 states and so 15 threshold voltages,
- PLC = 00000, 00001, 00010, 00011, 00100, 00101, 00110, 00111, 01000, 01001, 01010, 01011, 01100, 01101, 01110, 01111, 10000, 10001, 10010, 10011, 10100, 10101, 10110, 10111, 11000, 11001, 11010, 11011, 11100, 11101, 11110, 11111 – 32 states and so 31 threshold voltages.
Kioxia researchers devised 6-bit hexa-level cell flash (HLC) and 7-bit hepta-layer cell (HeLC) NAND in 2023. These are theoretical demonstrations for now.
The more bits a cell has the lower its endurance; its ability to have repeated write cycles before it wears out and stops functioning. For example, an SLC cell supports around 100,000 cycles while an MLC cell wears out after around 10,000 cycles. TLC is limited to 3,000 cycles. QLC supports about 1,200. A penta-level cells is likely to have less than 600 cycles, and so on for HLC and HeLC flash.