Kioxia outlined a tech roadmap to 1,000 layer 3D NAND at the IWM 2024 conference in Seoul against a backdrop of statements from NAND fab JV partner Western Digital that manufacturing costs are rising and returns on investment are falling.
Update: Kioxia response to notion of product dissonance between Kioxia and WD views on NAND technology development pace says technology development separate from product development cadence and implies the two companies agree on need for business returns from 3D NAND node levels. 2 July 2024.
The Japanese PC Watch media outlet covered Kioxia’s pitch, which predicted that NAND die density would reach 100 Gbit/mm2 with 1,000 wordline (memory cell) layers by 2027 by extrapolating past trends and improving NAND cell technology.
The number of 3D NAND layers generally increased from 24 in 2014 to 238 in 2022, a tenfold rise in eight years. Kioxia said a 1,000-layer level would be achievable by 2027 at this 1.33x/year rate of increase.
Increasing density in a 3D NAND die isn’t just a case of stacking more layers on the die, because an edge of each layer needs exposing for wordline electrical connectivity. This gives the die a staircase-like profile and, as the layer count increases, so too does the area of the die needed for the staircase.
That means that density must be increased by also shrinking the cell size vertically and laterally, and increasing the bit level from today’s TLC (3bits/cell) to QLC (4 bits/cell).
All these scaling vectors – layer counts, vertical cell size reduction, lateral cell size reduction, and cell bit level increases – bring their own technology problems. Having more layers means that etching the vertical connecting holes (through-silicon vias or TSVs) becomes more difficult as the TSV dimensions can be warped and the channel material layers deformed. A hole that is 0.1 μm in diameter and 5 μm or more deep has an aspect ratio of 50. As the hole gets deeper, the normal reactive ion etching (RIE) rate decreases and different low-temperature RIE has to be used to counteract that.
Deeper vias lead to higher channel resistance and the existing polycrystalline silicon (polysilicon) material will need modifying to single-crystalline silicon by being heat-treated in a metal induced lateral crystallization (MILC) process.
The staircase area of a die can be reduced by moving to two and four-lane wordlines per staircase level from today’s mono lane approach. Electrical connectivity within the stacked layers can be harmed as well by having longer paths for the electricity to transit, allowing resistance to affect the current. Kioxia is considering changing the wordline material from tungsten to molybdenum to decrease the current resistance and associated delay time.
All the problems it identifies are solved with ideas such as wordline metal changes and via etch technology advancements, but there is an issue that Kioxia’s technologists did not address. That is manufacturing capital costs and the return on that expenditure by selling chips and SSD using the fabbed NAND dies.
Western Digital EVP Robert Soderbery addressed this directly earlier this month, talking about a new era of NAND at a June 10 investor conference. Western Digital made the point that 3D NAND cost more to make than 2D NAND. NAND in the 3D era requires a higher capital intensity but delivers a lower cost reduction as bit density increases. Western Digital, which didn’t speak directly about its Kioxia hookup, is calling the situation the “end of the layers race.”
Soderbery said there would be a slowing of NAND layer count jumps to optimize capital deployment. Notably, he declared: “We’re no longer on a hamster wheel of nodal migration.” 3D NAND layer count nodes must be long-lasting, feature-rich, and future-proofed.
In other words, the lifetime of any particular node will be extended and Western Digital will look to maximize the return on its capital expenditure for a node level. That means, Soderbery said, its strategy will be to supply premium nodes for premium use cases with stronger Western Digital customer relationships. The large customers will give demand information to Western Digital, which will commit to supplying that demand with manufacturing arrangements.
Western Digital and Kioxia have announced their BiCS 8 generation 3D NAND product technology at a 218-layer level. BiCS 9 and BiCS 10 generations have been mentioned with 300 and 400-plus layer counts. These are a long way from a 1,000-layer node. One could imagine, given Western Digital’s views on capital expenditure and return on that investment, that the company might be unwilling to join Kioxia in making the multiple node level jumps necessary to reach 1,000 layers by 2027. Judging by that presentation, it wants to slow the nodal level increase rate, not maintain or increase it.
Kioxia is in a race with industry leader Samsung to reach flagship NAND density levels to retain and grow its market share. But we can imagine it soon having some intense discussions with Western Digital about the rate and timing of NAND node level increases. We have asked both for comment.
A Kioxia spokesperson replied: “IEEE forums like the IMW Workshop are gatherings of industry insiders to discuss technology enablement, advancements, and possibilities – the presentation that was delivered was not a product development statement or product announcement. The Kioxia presentation predicted that 100Gb/mm2 could be achieved by 2027 and we believe the technology, various design, and cell characteristics could be there.
“For Kioxia, the number of layers is not as important as the lateral scaling to minimize the cost and meet the performance goals of our customers for their applications. Kioxia has a longstanding viewpoint on this subject and has produced a range of materials (that we have made available on our website, blog and social media over the years) that speak to our opinion on number of layers and the costs that come with going higher vs. the benefits of lateral scaling. It is our stance that the cost-effective solution that meets performance and density requirements, regardless of number of layers, is the best solution.”
Hence there is no dissonance between the Kioxia and WD views at a product level.
